Exploring the difficulties in digital logic circuit reading comprehension via saccade analysis

Research output: Contribution to conferencePaper

Abstract

The purpose of this paper is to explore whether there are differences in the reading process between high-grade and low-grade students by tasking them to find a bug in a digital logic circuit. Based on the pre-test scores, 155 high school students were divided into a high-grade group and a low-grade group. To examine their reading process, both groups were asked to find a bug in a digital circuit, and an infrared eye tracker recorded their eye movement. Correlation coefficient was used to analyze the saccadic data. The findings show 1) the integrative saccades from signal names of the timing diagram to other Regions of Interest (ROI) has the lowest correlation coefficient (0.3345); 2) there is a larger difference in the integrative saccades between the high and low-grade groups from signal names of timing diagram to timing diagram ROIs of RESET, CLOCK, INPUT and OUTPUT. These findings show that the low-grade group had some difficulties in reading comprehension when reading timing diagrams of RESET and OUTPUT, but fewer difficulties when reading CLOCK and INPUT. In addition, difficulties in reading comprehension also appeared when calculating OUTPUT. This paper contributes to the field of learning science by providing evidence of the saccade difference between digital circuit readers with and without difficulties in reading comprehension.

Original languageEnglish
Pages210-215
Number of pages6
Publication statusPublished - 2013 Jan 1
Event21st International Conference on Computers in Education, ICCE 2013 - Bali, Indonesia
Duration: 2013 Nov 182013 Nov 22

Other

Other21st International Conference on Computers in Education, ICCE 2013
CountryIndonesia
CityBali
Period13/11/1813/11/22

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Keywords

  • Digital logic circuit
  • Eye movement
  • Reading process
  • Saccade

ASJC Scopus subject areas

  • Computer Science (miscellaneous)
  • Education

Cite this

Ho, H. F. (2013). Exploring the difficulties in digital logic circuit reading comprehension via saccade analysis. 210-215. Paper presented at 21st International Conference on Computers in Education, ICCE 2013, Bali, Indonesia.