Efficient VLSI architecture for training radial basis function networks

Zhe Cheng Fan, Wen Jyi Hwang*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

11 Citations (Scopus)


This paper presents a novel VLSI architecture for the training of radial basis function (RBF) networks. The architecture contains the circuits for fuzzy C-means (FCM) and the recursive Least Mean Square (LMS) operations. The FCM circuit is designed for the training of centers in the hidden layer of the RBF network. The recursive LMS circuit is adopted for the training of connecting weights in the output layer. The architecture is implemented by the field programmable gate array (FPGA). It is used as a hardware accelerator in a system on programmable chip (SOPC) for real-time training and classification. Experimental results reveal that the proposed RBF architecture is an effective alternative for applications where fast and efficient RBF training is desired.

Original languageEnglish
Pages (from-to)3848-3877
Number of pages30
JournalSensors (Switzerland)
Issue number3
Publication statusPublished - 2013 Mar


  • FPGA
  • Fuzzy C-means
  • Radial basis function
  • Reconfigurable computing
  • System on programmable chip

ASJC Scopus subject areas

  • Analytical Chemistry
  • Information Systems
  • Atomic and Molecular Physics, and Optics
  • Biochemistry
  • Instrumentation
  • Electrical and Electronic Engineering


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