Efficient architecture for spike sorting in reconfigurable hardware

INIS

• architecture 100%
• sorting 100%
• algorithms 83%
• fuzzy logic 66%
• calculation methods 50%
• performance 33%
• extraction 33%
• implementation 33%
• cost 33%
• operation 33%
• weight 16%
• design 16%
• vectors 16%
• employment 16%
• classification 16%
• iterative methods 16%
• storage 16%
• matrices 16%
• speed 16%

Computer Science

• Reconfigurable Hardware 100%
• Algorithms 100%
• Computation 50%
• Feature Extraction 50%
• Hardware Implementation 50%
• Design 25%
• Vectors 25%
• Efficient Computation 25%
• Experimental Result 25%
• Hardware Architecture 25%
• High Throughput 25%
• Hardware 25%
• System on a Chip 25%
• Principal Component 25%
• Field Programmable Gate Arrays 25%
• Cluster Centroid 25%
• Storage Requirement 25%
• Mean Algorithm 25%