Efficient architecture for island genetic algorithm in reconfigurable hardware

Chien Min Ou, Tsung Yi yu, Wen Jyi Hwang, Tsung Che Chiang

Research output: Contribution to journalArticle

Abstract

A novel VLSI architecture for an island genetic algorithm (GA) is presented in this paper. The island GA is based on steady-state GA for reducing the hardware resources consumption. Alook-up table based fast string migration architecture is proposed for lowering the computational overhead while enhancing the performance for the island GA. As compared with its single-island GA hardware counterpart, the proposed architecture attains superior performance with less computation time subject to the same total population size. In addition, the proposed architecture has significantly lower computational time as compared with its software counterparts running on cluster computer with multithreading for GA-based optimization.

Original languageEnglish
Pages (from-to)413-430
Number of pages18
JournalIntelligent Automation and Soft Computing
Volume18
Issue number4
DOIs
Publication statusPublished - 2012 Jan

Fingerprint

Reconfigurable hardware
Reconfigurable Hardware
Genetic algorithms
Genetic Algorithm
Hardware
VLSI Architecture
Multithreading
Population Size
Migration
Architecture
Table
Strings
Resources
Software
Optimization

Keywords

  • Fpga
  • Genetic algorithms
  • Reconfigurable computing
  • Vector quantization
  • Vlsi

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Computational Theory and Mathematics
  • Artificial Intelligence

Cite this

Efficient architecture for island genetic algorithm in reconfigurable hardware. / Ou, Chien Min; yu, Tsung Yi; Hwang, Wen Jyi; Chiang, Tsung Che.

In: Intelligent Automation and Soft Computing, Vol. 18, No. 4, 01.2012, p. 413-430.

Research output: Contribution to journalArticle

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