Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices

Piyas Samanta; Heng Sheng Huang; Shuang Yuan Chen; Chuan Hsi Liu

doi:10.1109/EDSSC.2014.7061072

Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices

Piyas Samanta, Heng Sheng Huang, Shuang Yuan Chen, Chuan Hsi Liu

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

A detailed investigation of the effect of nitridation of hafnium silicate on positive bias temperature instability (PBTI) in n⁺-polySi gate pMOS capacitor structures has been presented. Our analysis shows that nitridation improves the intrinsic oxide breakdown field, reduces the equivalent oxide thickness (EOT) and as-grown surface state density D_it by an order of magnitude. On the other hand, like NBTI degradation, nitridation significantly enhances PBTI degradation in pMOS devices causing reduction in PBTI lifetime at a given applied voltage V_G. However, both nitrided and non-nitrided gate stacks reaches 10 year lifetime at an applied gate bias of 1.2 V.

Original language	English
Title of host publication	2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479923342
DOIs	https://doi.org/10.1109/EDSSC.2014.7061072
Publication status	Published - 2014 Mar 13
Event	2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014 - Chengdu, China Duration: 2014 Jun 18 → 2014 Jun 20

Publication series

Name	2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014

Other

Other	2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014
Country	China
City	Chengdu
Period	14/6/18 → 14/6/20

Keywords

PBTI lifetime
pMOS
threshold voltage shift

ASJC Scopus subject areas

Electrical and Electronic Engineering
Hardware and Architecture

Access to Document

10.1109/EDSSC.2014.7061072

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Cite this

Samanta, P., Huang, H. S., Chen, S. Y., & Liu, C. H. (2014). Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices. In 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014 [7061072] (2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2014.7061072

Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices. / Samanta, Piyas; Huang, Heng Sheng; Chen, Shuang Yuan; Liu, Chuan Hsi.

2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. 7061072 (2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Samanta, P, Huang, HS, Chen, SY & Liu, CH 2014, Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices. in 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014., 7061072, 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014, Institute of Electrical and Electronics Engineers Inc., 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014, Chengdu, China, 14/6/18. https://doi.org/10.1109/EDSSC.2014.7061072

Samanta P, Huang HS, Chen SY, Liu CH. Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices. In 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014. Institute of Electrical and Electronics Engineers Inc. 2014. 7061072. (2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014). https://doi.org/10.1109/EDSSC.2014.7061072

Samanta, Piyas ; Huang, Heng Sheng ; Chen, Shuang Yuan ; Liu, Chuan Hsi. / Effect of nitridation of hafnium silicate gate dielectric on positive bias temperature instability in pMOS devices. 2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. (2014 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2014).

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abstract = "A detailed investigation of the effect of nitridation of hafnium silicate on positive bias temperature instability (PBTI) in n+-polySi gate pMOS capacitor structures has been presented. Our analysis shows that nitridation improves the intrinsic oxide breakdown field, reduces the equivalent oxide thickness (EOT) and as-grown surface state density Dit by an order of magnitude. On the other hand, like NBTI degradation, nitridation significantly enhances PBTI degradation in pMOS devices causing reduction in PBTI lifetime at a given applied voltage VG. However, both nitrided and non-nitrided gate stacks reaches 10 year lifetime at an applied gate bias of 1.2 V.",

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N2 - A detailed investigation of the effect of nitridation of hafnium silicate on positive bias temperature instability (PBTI) in n+-polySi gate pMOS capacitor structures has been presented. Our analysis shows that nitridation improves the intrinsic oxide breakdown field, reduces the equivalent oxide thickness (EOT) and as-grown surface state density Dit by an order of magnitude. On the other hand, like NBTI degradation, nitridation significantly enhances PBTI degradation in pMOS devices causing reduction in PBTI lifetime at a given applied voltage VG. However, both nitrided and non-nitrided gate stacks reaches 10 year lifetime at an applied gate bias of 1.2 V.

AB - A detailed investigation of the effect of nitridation of hafnium silicate on positive bias temperature instability (PBTI) in n+-polySi gate pMOS capacitor structures has been presented. Our analysis shows that nitridation improves the intrinsic oxide breakdown field, reduces the equivalent oxide thickness (EOT) and as-grown surface state density Dit by an order of magnitude. On the other hand, like NBTI degradation, nitridation significantly enhances PBTI degradation in pMOS devices causing reduction in PBTI lifetime at a given applied voltage VG. However, both nitrided and non-nitrided gate stacks reaches 10 year lifetime at an applied gate bias of 1.2 V.

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