Design of high-voltage-tolerant stimulus driver with adaptive loading consideration to suppress epileptic seizure in a 0.18-μm CMOS process

Chun Yu Lin; Yi Ju Li; Ming Dou Ker

doi:10.1007/s10470-014-0282-4

Design of high-voltage-tolerant stimulus driver with adaptive loading consideration to suppress epileptic seizure in a 0.18-μm CMOS process

Chun Yu Lin^*, Yi Ju Li, Ming Dou Ker

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

7 Citations (Scopus)

Abstract

A novel design of high-voltage-tolerant stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration is proposed in this work. The proposed design can deliver the required stimulus current within a specific range of loading impedance. Besides, this design in 0.18-μm low-voltage CMOS process can be operated with high supply voltage (V_CC) of 5-10 V without using the high-voltage transistors, and the process steps of high-voltage transistors can be reduced. The proposed design can be further integrated for an electronic epilepsy prosthetic system-on-chip.

Original language	English
Pages (from-to)	219-226
Number of pages	8
Journal	Analog Integrated Circuits and Signal Processing
Volume	79
Issue number	2
DOIs	https://doi.org/10.1007/s10470-014-0282-4
Publication status	Published - 2014 May

Keywords

Adaptive loading
Epileptic seizure suppression
High-voltage tolerance
Implantable device
Stimulator
System-on-chip (SoC)

ASJC Scopus subject areas

Signal Processing
Hardware and Architecture
Surfaces, Coatings and Films

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10.1007/s10470-014-0282-4

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title = "Design of high-voltage-tolerant stimulus driver with adaptive loading consideration to suppress epileptic seizure in a 0.18-μm CMOS process",

abstract = "A novel design of high-voltage-tolerant stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration is proposed in this work. The proposed design can deliver the required stimulus current within a specific range of loading impedance. Besides, this design in 0.18-μm low-voltage CMOS process can be operated with high supply voltage (VCC) of 5-10 V without using the high-voltage transistors, and the process steps of high-voltage transistors can be reduced. The proposed design can be further integrated for an electronic epilepsy prosthetic system-on-chip.",

keywords = "Adaptive loading, Epileptic seizure suppression, High-voltage tolerance, Implantable device, Stimulator, System-on-chip (SoC)",

author = "Lin, {Chun Yu} and Li, {Yi Ju} and Ker, {Ming Dou}",

note = "Funding Information: Acknowledgments This work was supported by National Science Council, Taiwan, under Contract NSC 102-2220-E-009-004, and by the {\textquoteleft}{\textquoteleft}Aim for the Top University Plan{\textquoteright}{\textquoteright} of National Chiao Tung University and Ministry of Education, Taiwan. The authors would like to thank Professors Fu-Zen Shaw, Sheng-Fu Liang, and their research group in National Cheng-Kung University, Taiwan, for their great help with the animal test. The authors would also like to thank Professors Chung-Yu Wu, Wen-Tai Liu, Jin-Chern Chiou, Herming Chiueh, Chia-Hsiang Yang, and Dr. Yue-Loong Hsin in Biomedical Electronics Translational Research Center, National Chiao Tung University, Taiwan, for their valuable technical discussions.",

year = "2014",

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doi = "10.1007/s10470-014-0282-4",

language = "English",

volume = "79",

pages = "219--226",

journal = "Analog Integrated Circuits and Signal Processing",

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AU - Lin, Chun Yu

AU - Li, Yi Ju

AU - Ker, Ming Dou

N1 - Funding Information: Acknowledgments This work was supported by National Science Council, Taiwan, under Contract NSC 102-2220-E-009-004, and by the ‘‘Aim for the Top University Plan’’ of National Chiao Tung University and Ministry of Education, Taiwan. The authors would like to thank Professors Fu-Zen Shaw, Sheng-Fu Liang, and their research group in National Cheng-Kung University, Taiwan, for their great help with the animal test. The authors would also like to thank Professors Chung-Yu Wu, Wen-Tai Liu, Jin-Chern Chiou, Herming Chiueh, Chia-Hsiang Yang, and Dr. Yue-Loong Hsin in Biomedical Electronics Translational Research Center, National Chiao Tung University, Taiwan, for their valuable technical discussions.

PY - 2014/5

Y1 - 2014/5

N2 - A novel design of high-voltage-tolerant stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration is proposed in this work. The proposed design can deliver the required stimulus current within a specific range of loading impedance. Besides, this design in 0.18-μm low-voltage CMOS process can be operated with high supply voltage (VCC) of 5-10 V without using the high-voltage transistors, and the process steps of high-voltage transistors can be reduced. The proposed design can be further integrated for an electronic epilepsy prosthetic system-on-chip.

AB - A novel design of high-voltage-tolerant stimulus driver for epileptic seizure suppression with low power design and adaptive loading consideration is proposed in this work. The proposed design can deliver the required stimulus current within a specific range of loading impedance. Besides, this design in 0.18-μm low-voltage CMOS process can be operated with high supply voltage (VCC) of 5-10 V without using the high-voltage transistors, and the process steps of high-voltage transistors can be reduced. The proposed design can be further integrated for an electronic epilepsy prosthetic system-on-chip.

KW - Adaptive loading

KW - Epileptic seizure suppression

KW - High-voltage tolerance

KW - Implantable device

KW - Stimulator

KW - System-on-chip (SoC)

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Design of high-voltage-tolerant stimulus driver with adaptive loading consideration to suppress epileptic seizure in a 0.18-μm CMOS process

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Keywords

ASJC Scopus subject areas

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