TY - JOUR
T1 - Design of Fin-Diode-Triggered Rotated Silicon-Controlled Rectifier for High- Speed Digital Application in 16-nm FinFET Process
AU - Chang, Rong Kun
AU - Lin, Chun Yu
AU - Ker, Ming Dou
N1 - Funding Information:
The chip fabrication was supported by the Taiwan Semiconductor Research Institute (TSRI), Taiwan. The authors would like to thank C.-Y. Chen and Y.-N. Jou from Vanguard International Semiconductor Corporation for their instrument support with VF-TLP measurement and W.-C. Wang and C.-N. Kuo from National Chiao Tung University for their instrument support with S-parameter measurement.
Funding Information:
Manuscript received January 20, 2020; revised March 31, 2020 and May 8, 2020; accepted May 13, 2020. Date of publication May 29, 2020; date of current version June 19, 2020. This work was supported in part by the Ministry of Education (MOE) through the SPROUT Project— Center for Neuromodulation Medical Electronics Systems of National Chiao Tung University, Taiwan, and in part by the Ministry of Science and Technology (MOST), Taiwan, under Contract MOST 108-2622-8-009-001-TE1. The review of this article was arranged by Editor C. Duvvury. (Corresponding author: Ming-Dou Ker.) Rong-Kun Chang and Ming-Dou Ker are with the Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: mdker@ieee.org).
Publisher Copyright:
© 1963-2012 IEEE.
PY - 2020/7
Y1 - 2020/7
N2 - The FinFET architecture has widely been used in the digital circuit application, due to the good short channel effect control and driving current boost. However, the worse thermal dispassion and smaller effective silicon volume would cause the significant impacts during the circuits under electrostatic discharge (ESD) event. Thus, the ESD protection device should be installed into the high-speed digital circuit to enhance the ESD robustness. To avoid the effect of circuit performance, the parasitic capacitance of ESD device must be as low as possible. In this article, two types of Fin-diode-triggered rotated silicon-controlled rectifier (SCR) with dual ESD current path have been proposed and verified in a 16-nm FinFET CMOS process. The proposed devices have better current-handling capability, sufficiently low parasitic, compact layout area, and low leakage current.
AB - The FinFET architecture has widely been used in the digital circuit application, due to the good short channel effect control and driving current boost. However, the worse thermal dispassion and smaller effective silicon volume would cause the significant impacts during the circuits under electrostatic discharge (ESD) event. Thus, the ESD protection device should be installed into the high-speed digital circuit to enhance the ESD robustness. To avoid the effect of circuit performance, the parasitic capacitance of ESD device must be as low as possible. In this article, two types of Fin-diode-triggered rotated silicon-controlled rectifier (SCR) with dual ESD current path have been proposed and verified in a 16-nm FinFET CMOS process. The proposed devices have better current-handling capability, sufficiently low parasitic, compact layout area, and low leakage current.
KW - Diode triggered
KW - FinFET architecture
KW - electrostatic discharge (ESD)
KW - silicon-controlled rectifier (SCR)
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U2 - 10.1109/TED.2020.2995145
DO - 10.1109/TED.2020.2995145
M3 - Article
AN - SCOPUS:85087327380
SN - 0018-9383
VL - 67
SP - 2725
EP - 2731
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 7
M1 - 9103976
ER -