Design of ESD protection for RF CMOS power amplifier with inductor in matching network

Shiang Yu Tsai; Chun Yu Lin; Li Wei Chu; Ming Dou Ker

doi:10.1109/APCCAS.2012.6419073

Design of ESD protection for RF CMOS power amplifier with inductor in matching network

Shiang Yu Tsai^*, Chun Yu Lin, Li Wei Chu, Ming Dou Ker

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Due to the potential for mass production, CMOS technologies have been widely used to implement radio-frequency integrated circuits (RF ICs). Electrostatic discharge (ESD), which is one of the most important reliability issues in CMOS technologies, must be considered in RF ICs. In this work, an on-chip ESD protection design for RF power amplifier (PA) was presented. The ESD protection design consisted of an inductor in the matching network of PA. The PA with this ESD protection had been designed and fabricated in a 65-nm CMOS process. The ESD-protected PA can sustain over 4-kV human-body-mode (HBM) ESD stress, while the unprotected PA was degraded after 1-kV HBM ESD stress.

Original language	English
Title of host publication	2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
Pages	467-470
Number of pages	4
DOIs	https://doi.org/10.1109/APCCAS.2012.6419073
Publication status	Published - 2012
Externally published	Yes
Event	2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan Duration: 2012 Dec 2 → 2012 Dec 5

Publication series

Name	IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other	2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
Country/Territory	Taiwan
City	Kaohsiung
Period	2012/12/02 → 2012/12/05

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/APCCAS.2012.6419073

Cite this

Tsai, S. Y., Lin, C. Y., Chu, L. W., & Ker, M. D. (2012). Design of ESD protection for RF CMOS power amplifier with inductor in matching network. In 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 (pp. 467-470). Article 6419073 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS). https://doi.org/10.1109/APCCAS.2012.6419073

Design of ESD protection for RF CMOS power amplifier with inductor in matching network. / Tsai, Shiang Yu; Lin, Chun Yu; Chu, Li Wei et al.
2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012. 2012. p. 467-470 6419073 (IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Tsai, SY, Lin, CY, Chu, LW & Ker, MD 2012, Design of ESD protection for RF CMOS power amplifier with inductor in matching network. in 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012., 6419073, IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, pp. 467-470, 2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012, Kaohsiung, Taiwan, 2012/12/02. https://doi.org/10.1109/APCCAS.2012.6419073

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abstract = "Due to the potential for mass production, CMOS technologies have been widely used to implement radio-frequency integrated circuits (RF ICs). Electrostatic discharge (ESD), which is one of the most important reliability issues in CMOS technologies, must be considered in RF ICs. In this work, an on-chip ESD protection design for RF power amplifier (PA) was presented. The ESD protection design consisted of an inductor in the matching network of PA. The PA with this ESD protection had been designed and fabricated in a 65-nm CMOS process. The ESD-protected PA can sustain over 4-kV human-body-mode (HBM) ESD stress, while the unprotected PA was degraded after 1-kV HBM ESD stress.",

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AU - Chu, Li Wei

AU - Ker, Ming Dou

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AB - Due to the potential for mass production, CMOS technologies have been widely used to implement radio-frequency integrated circuits (RF ICs). Electrostatic discharge (ESD), which is one of the most important reliability issues in CMOS technologies, must be considered in RF ICs. In this work, an on-chip ESD protection design for RF power amplifier (PA) was presented. The ESD protection design consisted of an inductor in the matching network of PA. The PA with this ESD protection had been designed and fabricated in a 65-nm CMOS process. The ESD-protected PA can sustain over 4-kV human-body-mode (HBM) ESD stress, while the unprotected PA was degraded after 1-kV HBM ESD stress.

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Design of ESD protection for RF CMOS power amplifier with inductor in matching network

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