Design of a 5.3-GHz 31.3-dBm Fully Integrated CMOS Power Amplifier Using Folded Splitting and Combining Architecture

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Fingerprint Dive into the research topics of 'Design of a 5.3-GHz 31.3-dBm Fully Integrated CMOS Power Amplifier Using Folded Splitting and Combining Architecture'. Together they form a unique fingerprint.

Engineering & Materials Science