Deep Reorganization: Retaining Residuals in TinyML

  • Hashan Roshantha Mendis
  • , Chih Kai Kang
  • , Chun Han Lin
  • , Ming Syan Chen
  • , Pi Cheng Hsiu*
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Designing intelligent, tiny devices with limited memory is immensely challenging, exacerbated by the additional memory requirement of residual connections in deep neural networks. In contrast to existing approaches that eliminate residuals to reduce peak memory usage at the cost of significant accuracy degradation, this paper presents DERO, which reorganizes residual connections by leveraging insights into the types and interdependencies of operations across residual connections. Evaluations were conducted across diverse model architectures designed for common computer vision applications. DERO consistently achieves peak memory usage comparable to plain-style models without residuals, while closely matching the accuracy of the original models with residuals.

Original languageEnglish
Title of host publicationProceedings of the 61st ACM/IEEE Design Automation Conference, DAC 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798400706011
DOIs
Publication statusPublished - 2024 Nov 7
Event61st ACM/IEEE Design Automation Conference, DAC 2024 - San Francisco, United States
Duration: 2024 Jun 232024 Jun 27

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference61st ACM/IEEE Design Automation Conference, DAC 2024
Country/TerritoryUnited States
CitySan Francisco
Period2024/06/232024/06/27

Keywords

  • TinyML
  • deep neural networks
  • peak memory
  • residual connections

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modelling and Simulation

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