@inproceedings{1e21ea49e753445db3261bd8d363ad36,
title = "Constrained via minimization with practical considerations for multi-layer VLSI/PCB routing problems",
abstract = "A segment-crossing graph model is introduced, and a heuristic algorithm is proposed on the basis of this graph model. The algorithm is divided into two steps: Global Minimization and Local Minimization. In addition, practical considerations such as restricted terminals and adjacent limitations are addressed. The algorithm is evaluated by some routing examples using five layers. The results show that 45% of vias minimized are obtained on an average.",
author = "Fang, {Sung Chuan} and Chang, {Kuo En} and Feng, {Wu Shiung} and Chen, {Sao Jie}",
year = "1991",
doi = "10.1145/127601.127629",
language = "English",
isbn = "0818691492",
series = "Proceedings - Design Automation Conference",
publisher = "Publ by IEEE",
pages = "60--65",
booktitle = "Proceedings - Design Automation Conference",
note = "Proceedings of the 28th ACM/IEEE Design Automation Conference ; Conference date: 17-06-1991 Through 21-06-1991",
}