Comparison of NMOSFET and PMOSFET devices that combine CESL stressor and SiGe channel

H. W. Hsu, H. S. Huang, C. C. Lee, S. Y. Chen, H. H. Teng, M. R. Peng, M. C. Wang, C. H. Liu*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

Strained-Si technology could enhance the carrier mobility and improve the device performance. Contact-etch-stop-layer (CESL) structure with different stress and SiGe channel was fabricated with 90-nm technology. The electrical properties of N and PMOSFET devices combining CESL and SiGe channel were investigated. The short channel effects (SCE), such as drain-induced barrier lowering (DIBL), were also studied. Moreover, the stress contour in the SiGe channel has been simulated with TCAD to understand the relationship between stress distribution and device performance for different CESL structures. It is observed that the stress in the channel region was independent of the type of N or PMOSFET devices, but it was dependent on the CESL type and channel length. Based on the experimental and simulation results, it is confirmed that the device performance is associated with the stress in the channel, and the approach of CESL stressor and SiGe channel is shown to effectively improve the mobility of NMOSFETs and PMOSFETs.

Original languageEnglish
Pages (from-to)8127-8132
Number of pages6
JournalJournal of Nanoscience and Nanotechnology
Volume13
Issue number12
DOIs
Publication statusPublished - 2013 Dec

Keywords

  • Contact-Etch-Stop-Layer (CESL)
  • SiGe Channel
  • Strained-Si Technology
  • Stress Distribution.

ASJC Scopus subject areas

  • Bioengineering
  • General Chemistry
  • Biomedical Engineering
  • General Materials Science
  • Condensed Matter Physics

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