CMOS oversampling Δ Σ magnetic-to-digital converters

Chien Hung Kuo; Shr Lung Chen; Lee An Ho; Shen Iuan Liu

doi:10.1109/4.953488

CMOS oversampling Δ Σ magnetic-to-digital converters

Chien Hung Kuo^*
, Shr Lung Chen
, Lee An Ho
, Shen Iuan Liu

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

17 Citations (Scopus)

Abstract

In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.

Original language	English
Pages (from-to)	1582-1586
Number of pages	5
Journal	IEEE Journal of Solid-State Circuits
Volume	36
Issue number	10
DOIs	https://doi.org/10.1109/4.953488
Publication status	Published - 2001 Oct
Externally published	Yes

Keywords

CMOS
Delta-sigma modulator
Magnetic sensor

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1109/4.953488

Cite this

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title = "CMOS oversampling Δ Σ magnetic-to-digital converters",

abstract = "In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3\% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.",

keywords = "CMOS, Delta-sigma modulator, Magnetic sensor",

author = "Kuo, \{Chien Hung\} and Chen, \{Shr Lung\} and Ho, \{Lee An\} and Liu, \{Shen Iuan\}",

year = "2001",

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doi = "10.1109/4.953488",

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T1 - CMOS oversampling Δ Σ magnetic-to-digital converters

AU - Kuo, Chien Hung

AU - Chen, Shr Lung

AU - Ho, Lee An

AU - Liu, Shen Iuan

PY - 2001/10

Y1 - 2001/10

N2 - In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.

AB - In this paper, two CMOS oversampling delta-sigma (Δ Σ) magnetic-to-digital converters (MDCs) are proposed. The first MDC consists of the magnetic operational amplifier (MOP) and a first-order switched-capacitor (SC) Δ Σ modulator. The second one directly uses the MOP to realize a first-order SC Δ Σ modulator. They can convert the external magnetic field into digital form. Both circuits were fabricated in a 0.5-μm CMOS double-poly double-metal (DPDM) process and operated at a 5-V supply voltage and the nominal sampling rate of 2.5 MHz. The dynamic ranges of these converters are at least ±100 mT. The gain errors within ±100 mT are less than 3% and the minimum detectable magnetic field can reach as small as 1 mT. The resolutions are 100 μT for both of the two MDCs. The measured sensitivities are 1.327 mv/mT and 0.45 mv/mT for the first and the second MDC, respectively.

KW - CMOS

KW - Delta-sigma modulator

KW - Magnetic sensor

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JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 10

ER -

CMOS oversampling Δ Σ magnetic-to-digital converters

Abstract

Keywords

ASJC Scopus subject areas

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