CMOS oversampling Δ Σ magnetic to digital converters

Lee An Ho, Shr Lung Chen, Chien Hung Kuo, Shen Iuan Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In this paper, a CMOS oversampling delta sigma (Δ Σ) magnetic to digital converter (MDC) is proposed. In the MDC, the magnetic operational amplifier (MOP) combines with the switched capacitor (SC) Δ Σ modulator, and converts the external magnetic field into digital form. Simulation and measurement results indicate that the average digital output versus the applied magnetic field is quite linear. The prototype circuit was fabricated in a 0.5 μm CMOS DPDM process. The circuit operates at a 5 V supply voltage and the sampling rate of 2.5 MHz. The maximum signal range of the converter is at least ±100 mT and the resolution can reach as small as 1 mT. The gain error within ±100 mT is less than 3%. The conversion gain is 1.327 mv/mT and the power consumption is 49.3 mW.

Original languageEnglish
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Pages388-391
Number of pages4
Volume1
DOIs
Publication statusPublished - 2001
Externally publishedYes
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: 2001 May 62001 May 9

Other

Other2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
CountryAustralia
CitySydney, NSW
Period01/5/601/5/9

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ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

Cite this

Ho, L. A., Chen, S. L., Kuo, C. H., & Liu, S. I. (2001). CMOS oversampling Δ Σ magnetic to digital converters. In ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings (Vol. 1, pp. 388-391) https://doi.org/10.1109/ISCAS.2001.921874