Abstract
The boundary-scan test provides a structural test solution for the densely packed digital electronics. For RF devices, the structural test also provides a good diagnostic resolution to the structural defects of RF circuits, especially for the high pin-count RF-SOCs. In this paper, the boundary-scan test is implemented on a 5-GHz RF pin using LC isolation networks to connect the RF lines and the boundary-scan cell, which isolates the RF circuitry from the digital boundary scan cell. This technique overcomes the parasitic loading problems and provides a minimum RF performance degradation to a RFIC. The measurement results show only 0.4-dB gain degradation in a 5-GHz amplifier with a boundary-scan cell and LC isolation networks.
| Original language | English |
|---|---|
| Pages | 347-350 |
| Number of pages | 4 |
| Publication status | Published - 2004 |
| Externally published | Yes |
| Event | Proceedings - 22nd IEEE VLSI Test Symposium - Napa Valley, CA, United States Duration: 2004 Apr 25 → 2004 Apr 29 |
Other
| Other | Proceedings - 22nd IEEE VLSI Test Symposium |
|---|---|
| Country/Territory | United States |
| City | Napa Valley, CA |
| Period | 2004/04/25 → 2004/04/29 |
ASJC Scopus subject areas
- Computer Science Applications
- Electrical and Electronic Engineering
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