Boundary scan for 5-GHz RF pins using LC isolation networks

Tian Wei Huang*, Pei Si Wu, Ren Chieh Liu, Jeng Han Tsai, Huei Wang, Tzi Dar Chiueh

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

The boundary-scan test provides a structural test solution for the densely packed digital electronics. For RF devices, the structural test also provides a good diagnostic resolution to the structural defects of RF circuits, especially for the high pin-count RF-SOCs. In this paper, the boundary-scan test is implemented on a 5-GHz RF pin using LC isolation networks to connect the RF lines and the boundary-scan cell, which isolates the RF circuitry from the digital boundary scan cell. This technique overcomes the parasitic loading problems and provides a minimum RF performance degradation to a RFIC. The measurement results show only 0.4-dB gain degradation in a 5-GHz amplifier with a boundary-scan cell and LC isolation networks.

Original languageEnglish
Pages347-350
Number of pages4
Publication statusPublished - 2004
Externally publishedYes
EventProceedings - 22nd IEEE VLSI Test Symposium - Napa Valley, CA, United States
Duration: 2004 Apr 252004 Apr 29

Other

OtherProceedings - 22nd IEEE VLSI Test Symposium
Country/TerritoryUnited States
CityNapa Valley, CA
Period2004/04/252004/04/29

ASJC Scopus subject areas

  • Computer Science Applications
  • Electrical and Electronic Engineering

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