An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design

Chien Hung Kuo; Shu Li Liao

doi:10.1109/NEWCAS.2011.5981321

An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design

Chien Hung Kuo^*, Shu Li Liao

^*Corresponding author for this work

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper presents an all-digital 4-bit delta-sigma (ΔΣ) modulator for envelope elimination and restoration (EER)-based polar transmitters. A fast feedback approach is devised by combining the digital truncator with path gains to reduce the propagation delay of feedback loops in modulators. The CMOS standard cell-based design could hence be utilized to implement the proposed modulator at a sampling frequency of 182 MHz. The noise transfer function of the presented ΔΣ modulator has been optimized to obtain a maximally flat noise band to easily meet the EDGE spectrum mask. Experiment results show the presented ΔΣ modulator has the noise power beneath -60 dB below the full-scale EDGE signal within ±20 MHz of the carrier frequency. The measured adjacent channel power ratios and alternate channel power ratio of the proposed modulator also give a 6 dB margin to the EDGE specification at 400 kHz and 600 kHz offsets.

Original language	English
Title of host publication	2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
Pages	325-328
Number of pages	4
DOIs	https://doi.org/10.1109/NEWCAS.2011.5981321
Publication status	Published - 2011
Event	2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011 - Bordeaux, France Duration: 2011 Jun 26 → 2011 Jun 29

Publication series

Name	2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011

Other

Other	2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011
Country/Territory	France
City	Bordeaux
Period	2011/06/26 → 2011/06/29

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/NEWCAS.2011.5981321

Cite this

Kuo, C. H., & Liao, S. L. (2011). An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design. In 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011 (pp. 325-328). Article 5981321 (2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011). https://doi.org/10.1109/NEWCAS.2011.5981321

An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design. / Kuo, Chien Hung; Liao, Shu Li.
2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011. 2011. p. 325-328 5981321 (2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kuo, CH & Liao, SL 2011, An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design. in 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011., 5981321, 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011, pp. 325-328, 2011 IEEE 9th International New Circuits and Systems Conference, NEWCAS 2011, Bordeaux, France, 2011/06/26. https://doi.org/10.1109/NEWCAS.2011.5981321

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abstract = "This paper presents an all-digital 4-bit delta-sigma (ΔΣ) modulator for envelope elimination and restoration (EER)-based polar transmitters. A fast feedback approach is devised by combining the digital truncator with path gains to reduce the propagation delay of feedback loops in modulators. The CMOS standard cell-based design could hence be utilized to implement the proposed modulator at a sampling frequency of 182 MHz. The noise transfer function of the presented ΔΣ modulator has been optimized to obtain a maximally flat noise band to easily meet the EDGE spectrum mask. Experiment results show the presented ΔΣ modulator has the noise power beneath -60 dB below the full-scale EDGE signal within ±20 MHz of the carrier frequency. The measured adjacent channel power ratios and alternate channel power ratio of the proposed modulator also give a 6 dB margin to the EDGE specification at 400 kHz and 600 kHz offsets.",

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AB - This paper presents an all-digital 4-bit delta-sigma (ΔΣ) modulator for envelope elimination and restoration (EER)-based polar transmitters. A fast feedback approach is devised by combining the digital truncator with path gains to reduce the propagation delay of feedback loops in modulators. The CMOS standard cell-based design could hence be utilized to implement the proposed modulator at a sampling frequency of 182 MHz. The noise transfer function of the presented ΔΣ modulator has been optimized to obtain a maximally flat noise band to easily meet the EDGE spectrum mask. Experiment results show the presented ΔΣ modulator has the noise power beneath -60 dB below the full-scale EDGE signal within ±20 MHz of the carrier frequency. The measured adjacent channel power ratios and alternate channel power ratio of the proposed modulator also give a 6 dB margin to the EDGE specification at 400 kHz and 600 kHz offsets.

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An all-digital ΔΣ envelope modulator for EER-based transmitters based on CMOS standard cell design

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