A X-band fully integrated CMOS frequency synthesizer

Jeng-Han Tsai, Chia Hsiang Chao, Hung Da Shih

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

A X-band frequency synthesizer with 2-bit control mode is implemented in standard 0.18-μm 1P6M CMOS process. A cascoded topology of voltage control oscillator (VCO) and first stage current mode logic (CML) divider is adopted for current reuse, low power, and robust tracking between VCO and the frequency divider. The measured in-band phase noise of the synthesizer is -75.06 dBc/Hz at a frequency offset of 100 kHz and out-of-band phase noise is -119.8 dBc/Hz at a frequency offset of 10 MHz. The total power consumption is 36.75 mW. The chip size is 0.745 × 0.76mm2.

Original languageEnglish
Title of host publication2012 Asia-Pacific Microwave Conference, APMC 2012 - Proceedings
Pages1226-1228
Number of pages3
DOIs
Publication statusPublished - 2012 Dec 1
Event2012 Asia-Pacific Microwave Conference, APMC 2012 - Kaohsiung, Taiwan
Duration: 2012 Dec 42012 Dec 7

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC

Other

Other2012 Asia-Pacific Microwave Conference, APMC 2012
CountryTaiwan
CityKaohsiung
Period12/12/412/12/7

Keywords

  • Frequency synthesizer
  • X-band
  • phase-locked loop (PLL)
  • voltage-controlled oscillator (VCO)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Tsai, J-H., Chao, C. H., & Shih, H. D. (2012). A X-band fully integrated CMOS frequency synthesizer. In 2012 Asia-Pacific Microwave Conference, APMC 2012 - Proceedings (pp. 1226-1228). [6421877] (Asia-Pacific Microwave Conference Proceedings, APMC). https://doi.org/10.1109/APMC.2012.6421877