A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator

Hsiang Hui Chang, Chien Hung Kuo, Ming Huang Liu, Shen Iuan Liu

Research output: Contribution to journalArticle

Abstract

A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm 2.

Original languageEnglish
Pages (from-to)179-189
Number of pages11
JournalAnalog Integrated Circuits and Signal Processing
Volume37
Issue number3
DOIs
Publication statusPublished - 2003 Dec
Externally publishedYes

Fingerprint

Modulators
Operational amplifiers
Electric potential
Metals
Switches
Bandwidth

Keywords

  • Bandpass delta-sigma modulator
  • Low-voltage
  • Switched-capacitor
  • Two-path structure

ASJC Scopus subject areas

  • Signal Processing
  • Hardware and Architecture
  • Surfaces, Coatings and Films

Cite this

A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator. / Chang, Hsiang Hui; Kuo, Chien Hung; Liu, Ming Huang; Liu, Shen Iuan.

In: Analog Integrated Circuits and Signal Processing, Vol. 37, No. 3, 12.2003, p. 179-189.

Research output: Contribution to journalArticle

Chang, Hsiang Hui ; Kuo, Chien Hung ; Liu, Ming Huang ; Liu, Shen Iuan. / A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator. In: Analog Integrated Circuits and Signal Processing. 2003 ; Vol. 37, No. 3. pp. 179-189.
@article{58476422115449b58da880adcb93f5b0,
title = "A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator",
abstract = "A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm 2.",
keywords = "Bandpass delta-sigma modulator, Low-voltage, Switched-capacitor, Two-path structure",
author = "Chang, {Hsiang Hui} and Kuo, {Chien Hung} and Liu, {Ming Huang} and Liu, {Shen Iuan}",
year = "2003",
month = "12",
doi = "10.1023/A:1026265624740",
language = "English",
volume = "37",
pages = "179--189",
journal = "Analog Integrated Circuits and Signal Processing",
issn = "0925-1030",
publisher = "Springer Netherlands",
number = "3",

}

TY - JOUR

T1 - A Sub-1V Fourth-Order Bandpass Delta-Sigma Modulator

AU - Chang, Hsiang Hui

AU - Kuo, Chien Hung

AU - Liu, Ming Huang

AU - Liu, Shen Iuan

PY - 2003/12

Y1 - 2003/12

N2 - A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm 2.

AB - A sub-1V fourth-order bandpass delta-sigma modulator is presented in this paper. Using the switched opamp technique enables the modulator to operate at only 0.8 V supply voltage without using voltage multipliers or bootstrapping switches. A two-path structure is applied to relax the settling requirement. Implemented in a 0.25-μm one-poly, five-metal standard CMOS process, the prototype modulator exhibits a signal-to-noise-plus-distortion ratio (SNDR) of 58.2 db and a dynamic range (DR) of 64 db in a 60 KHz signal bandwidth centered at 1.25 MHz while consuming 2.5 mW and occupying an active area of 2.11 mm 2.

KW - Bandpass delta-sigma modulator

KW - Low-voltage

KW - Switched-capacitor

KW - Two-path structure

UR - http://www.scopus.com/inward/record.url?scp=0345328315&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0345328315&partnerID=8YFLogxK

U2 - 10.1023/A:1026265624740

DO - 10.1023/A:1026265624740

M3 - Article

AN - SCOPUS:0345328315

VL - 37

SP - 179

EP - 189

JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

SN - 0925-1030

IS - 3

ER -