A quadruple-sampling second-order delta-sigma modulator

Chien-Hung Kuo, Wei Wei Tseng

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, a 1.8-V 3-bit quadruple-sampling delta-sigma modulator for audio application is presented. To performance high-resolution and low-cost modulator, a single opamp is used to complete the integration with four phases. Since the phase difference between any two succeeding clocks is 90 degrees, the sampling rate will be four times of clock frequency. The effective integration time can also be increased, and thus relaxing the requirements of opamp. From the simulation results, the proposed modulator achieves a peak SNDR of 104.5 dB for 20-kHz signal bandwidth under 1.8-V supply voltage and 2.56 MHz clock rate.

Original languageEnglish
Title of host publication2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509023332
DOIs
Publication statusPublished - 2016 Dec 27
Event5th IEEE Global Conference on Consumer Electronics, GCCE 2016 - Kyoto, Japan
Duration: 2016 Oct 112016 Oct 14

Publication series

Name2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016

Other

Other5th IEEE Global Conference on Consumer Electronics, GCCE 2016
CountryJapan
CityKyoto
Period16/10/1116/10/14

Fingerprint

clocks
Modulators
modulators
Clocks
Operational amplifiers
sampling
Sampling
bandwidth
Bandwidth
requirements
high resolution
Electric potential
electric potential
Costs
simulation

Keywords

  • Multibit DSM
  • Quadruple-Sampling
  • Time-Interleaved

ASJC Scopus subject areas

  • Signal Processing
  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Hardware and Architecture
  • Instrumentation

Cite this

Kuo, C-H., & Tseng, W. W. (2016). A quadruple-sampling second-order delta-sigma modulator. In 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016 [7800473] (2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/GCCE.2016.7800473

A quadruple-sampling second-order delta-sigma modulator. / Kuo, Chien-Hung; Tseng, Wei Wei.

2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7800473 (2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kuo, C-H & Tseng, WW 2016, A quadruple-sampling second-order delta-sigma modulator. in 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016., 7800473, 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016, Institute of Electrical and Electronics Engineers Inc., 5th IEEE Global Conference on Consumer Electronics, GCCE 2016, Kyoto, Japan, 16/10/11. https://doi.org/10.1109/GCCE.2016.7800473
Kuo C-H, Tseng WW. A quadruple-sampling second-order delta-sigma modulator. In 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc. 2016. 7800473. (2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016). https://doi.org/10.1109/GCCE.2016.7800473
Kuo, Chien-Hung ; Tseng, Wei Wei. / A quadruple-sampling second-order delta-sigma modulator. 2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016. Institute of Electrical and Electronics Engineers Inc., 2016. (2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016).
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