A Gain Enhancement Structure Using 28-nm CMOS Process for V-band Power Amplifier Applications

Kai Jie Chuang, Wei Ting Bai, Yu Chun Chen, Wen Jie Lin, Jeng Han Tsai, Tian Wei Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a gain enhancement layout structure which improves the performance of millimeter-wave power amplifier in 2S-nm CMOS, especially small signal gain. The measurement results demonstrate that small signal gain increases 1.3-dB from 16.2 dB to 17.5 dB in V-band power amplifier by means of gain enhancement structure without expanding chip area. Additionally, this structure was also utilized in a published 28-nm wideband power amplifier to demonstrate a 20-dB small signal gain in 28 GHz without losing the broad bandwidth.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665433914
DOIs
Publication statusPublished - 2021 Aug 25
Event2021 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2021 - Hualien, Taiwan
Duration: 2021 Aug 252021 Aug 27

Publication series

Name2021 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2021

Conference

Conference2021 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2021
Country/TerritoryTaiwan
CityHualien
Period2021/08/252021/08/27

Keywords

  • gain enhancement
  • layout
  • millimeter wave (MMW))
  • power amplifier

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Instrumentation

Fingerprint

Dive into the research topics of 'A Gain Enhancement Structure Using 28-nm CMOS Process for V-band Power Amplifier Applications'. Together they form a unique fingerprint.

Cite this