@inproceedings{734c72a25f3e40dcbf3cdb5e2d03706e,
title = "A delta-sigma modulator-based class-D amplifier",
abstract = "A new architecture of class-D amplifier with a multibit delta-sigma modulator control is presented in this paper. In the presented amplifier, the 3-bit 8-level digital outputs of the second-order delta-sigma modulator are utilized to generate switching signals with different pulse widths for the class-D power amplifier. A closed-loop class-D amplifier is adopted by feeding the analog output signal from the power stage to the input to improve the linearity. The presented class-D amplifier is simulated with TSMC 0.18-μm CMOS process. The SNDR of the proposed amplifier is 78 dB within a 25 kHz signal bandwidth under a sample rate of 2.56 MHz. The THD is 0.01% at a power consumption of 140 mW.",
keywords = "Class-D Amplifier, Delta-Sigma Class-D Amplifier, Switching Amplifier",
author = "Kuo, {Chien Hung} and Lin, {Sheng Chi}",
year = "2016",
month = dec,
day = "27",
doi = "10.1109/GCCE.2016.7800440",
language = "English",
series = "2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2016 IEEE 5th Global Conference on Consumer Electronics, GCCE 2016",
note = "5th IEEE Global Conference on Consumer Electronics, GCCE 2016 ; Conference date: 11-10-2016 Through 14-10-2016",
}