A 60 GHz CMOS power amplifier with built-in pre-distortion linearizer

Jeng-Han Tsai, Chung Han Wu, Hong Yuan Yang, Tian Wei Huang

Research output: Contribution to journalArticle

23 Citations (Scopus)

Abstract

A built-in pre-distortion linearizer using cold-mode MOSFET with forward body bias is presented for 60 GHz CMOS PA linearization on 90 nm CMOS LP process. The power amplifier (PA) achieves a P sat of 10.72 dBm and OP 1 dB of 7.3 dBm from 1.2 V supply. After linearization, the OP 1 dB has been doubled from 7.3 to 10.2 dBm and the operating PAE at OP 1 dB consequently improves from 5.4% to 10.8%. The optimum improvement of the IMD3 is 25 dB.

Original languageEnglish
Article number6070991
Pages (from-to)676-678
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume21
Issue number12
DOIs
Publication statusPublished - 2011 Dec 1

Fingerprint

linearization
power amplifiers
Power amplifiers
Linearization
CMOS
field effect transistors

Keywords

  • 60 GHz
  • CMOS
  • linearization
  • linearizer
  • power amplifier (PA)
  • pre-distortion

ASJC Scopus subject areas

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

Cite this

A 60 GHz CMOS power amplifier with built-in pre-distortion linearizer. / Tsai, Jeng-Han; Wu, Chung Han; Yang, Hong Yuan; Huang, Tian Wei.

In: IEEE Microwave and Wireless Components Letters, Vol. 21, No. 12, 6070991, 01.12.2011, p. 676-678.

Research output: Contribution to journalArticle

Tsai, Jeng-Han ; Wu, Chung Han ; Yang, Hong Yuan ; Huang, Tian Wei. / A 60 GHz CMOS power amplifier with built-in pre-distortion linearizer. In: IEEE Microwave and Wireless Components Letters. 2011 ; Vol. 21, No. 12. pp. 676-678.
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