In this letter, a 6-GHz spread spectrum clock generation for Serial AT Attachment Generation 3 (SATA—III) applications in 0.18-pm CMOS technology is presented. The 3rd-order loop filter is to reduce the ripple of control voltage of VCO and the loop bandwidth is 625 KHz. With the aid of second-order delta-sigma (ΔΣ) modulator and triangular profile counter, the division ratio of divider chain can be changed periodically. The modulation frequency is 37.04 KHz with upper bound of 19 for the triangular profile counter. The proposed circuit spreads 30-MHz frequency range from 5.97 to 6.0 GHz with an EMI reduction of 20.3 dB. The dc power consumption is 34 mW with a chip size of 0.54 mm2.
- EMI reduction
- spread spectrum
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Electrical and Electronic Engineering