A 57-66 GHz power amplifier with a linearization technique in 65-nm CMOS process

Jin Fu Yeh, Jen Hao Cheng, Jeng Han Tsai, Tian Wei Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper presents a linearization technique with a body diode for 60-GHz power amplifier (PA). This linearization technique aims to achieve adequate linear output power as PA operating under lower power consumption. This proposed technique can benefit the reduction of total power consumption of a 60-GHz phased array. The PA is implemented in TSMC 65-nm CMOS process. At 1-V supply voltage, the measured maximum output powers are all larger than 10 dBm over 57-66 GHz. Third-order inter-modulation distortion (IMD3) can be mitigated over 30 dB by the proposed linearization technique. Moreover, the improvement of IMD3 is larger than 25 dB among the entire operation bandwidth.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2014
Subtitle of host publicationConnecting the Future, EuMW 2014 - Conference Proceedings; EuMC 2014: 44th European Microwave Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1253-1256
Number of pages4
ISBN (Electronic)9782874870354
DOIs
Publication statusPublished - 2014 Dec 15
Externally publishedYes
Event2014 44th European Microwave Conference, EuMC 2014 - Held as Part of the 17th European Microwave Week, EuMW 2014 - Rome, Italy
Duration: 2014 Oct 62014 Oct 9

Publication series

NameEuropean Microwave Week 2014: Connecting the Future, EuMW 2014 - Conference Proceedings; EuMC 2014: 44th European Microwave Conference

Other

Other2014 44th European Microwave Conference, EuMC 2014 - Held as Part of the 17th European Microwave Week, EuMW 2014
Country/TerritoryItaly
CityRome
Period2014/10/062014/10/09

Keywords

  • 60-GHz
  • diode
  • linearizer
  • power amplifier(PA)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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