A 30-60GHz cmos sub-harmonic IQ de/modulator for high data-rate communication system applications

Wei Heng Lin, Wei Lun Chang, Jeng Han Tsai, Tian Wei Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

9 Citations (Scopus)

Abstract

A 30-60 GHz sub-harmonic IQ de/modulator using TSMC CMOS 0.13-μm process is presented in this paper. The IQ de/modulator consists of two FET resistive mixers, a 90° coupler, and a Wilkinson power divider. The resistive mixer could simultaneously used as a up-converted or a down-converted mixer. Therefore, the measurement of the FET resistive mixer based modulator or demodulator will be done. The die size is 0.78 mm × 0.58 mm. Both IQ demodulator and modulator feature the conversion loss of - 16±1 dB and good demodulation and modulation capacity.

Original languageEnglish
Title of host publicationRWS 2009 IEEE Radio and Wireless Symposium, Proceedings
Pages462-465
Number of pages4
DOIs
Publication statusPublished - 2009
Event2009 IEEE Radio and Wireless Symposium, RWS 2009 - San Diego, CA, United States
Duration: 2008 Jan 182008 Jan 22

Publication series

NameRWS 2009 IEEE Radio and Wireless Symposium, Proceedings

Other

Other2009 IEEE Radio and Wireless Symposium, RWS 2009
CountryUnited States
CitySan Diego, CA
Period2008/01/182008/01/22

Keywords

  • CMOS
  • Demodulator
  • Modulator
  • Sub-harmonic
  • directconversion

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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