A 128-phase delay-locked loop with cyclic VCDL

Engineering

• Phase Delay 100%
• Locked Loop 100%
• Electric Power Utilization 50%
• Electric Delay Lines 50%
• Output Phase 50%
• Supply Voltage 50%

INIS

• voltage 100%
• units 50%
• supply 50%
• power 50%
• output 50%
• mhz range 50%