A 10-bit 2.5mW 0.27mm 22 CMOS DAC with spike-free switching

Chien Hung Kuo, Jen Chieh Tsai

Research output: Contribution to conferencePaper

2 Citations (Scopus)

Abstract

A low-power digital-to-analog converter for portable electronics is introduced. A fully segmented architecture with a spike-free current mirror is presented to improve the INL/DNL and reduce the power consumption of the high-speed current steering DAC. The presented 10-bit DAC have been implemented in 0.18μm IP6M CMOS standard technology, and its core area is 0.27mm 2. The simulation results show the DNL/INL is ±0.14/0.14 at a conversion rate of 10MHz, and consume 2.5mW of power from a 1.8V supply voltage.

Original languageEnglish
Pages473-476
Number of pages4
Publication statusPublished - 2005 Dec 12
Event9th International Symposium on Consumer Electronics 2005, ISCE 2005 - , Macao
Duration: 2005 Jun 142005 Jun 16

Other

Other9th International Symposium on Consumer Electronics 2005, ISCE 2005
CountryMacao
Period05/6/1405/6/16

Keywords

  • Current mirror
  • Digital-to-analog converter
  • Low power

ASJC Scopus subject areas

  • Engineering(all)

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    Kuo, C. H., & Tsai, J. C. (2005). A 10-bit 2.5mW 0.27mm 22 CMOS DAC with spike-free switching. 473-476. Paper presented at 9th International Symposium on Consumer Electronics 2005, ISCE 2005, Macao.