A ΔΣ modulator with 3-Bit, 37-level pre-detective dynamic quantization

In this paper, a high-resolution delta-sigma modulator with a pre-detective dynamic quantizer is proposed. A 37-level quantization can be achieved by using only a 3-bit quantizer in the proposed dynamic quantizer. In the proposed structure, a signal detector is added at the input of the presented modulator to pre-detect the magnitude of the sampled input and switch the dynamic quantizer to the corresponding quantization range. With the proposed technique, the quantization level can be greatly increased, and the number of comparators will hence be substantially reduced for a high-level quantization. The resulting resolution of delta-sigma modulators can thus be significantly promoted without consuming much power and area. The proposed delta-sigma modulator is implemented in a TSMC 0.18-μm 1P6M CMOS process. The signal-to-noise plus distortion ratio is 101.2 dB in a signal band of 25 kHz. The power consumption is 1.68 mW at a 1.8 V supply voltage.