Fingerprint
Dive into the research topics of '2 X VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process'. Together they form a unique fingerprint.- Sort by
- Weight
- Alphabetically
2 X VDD-tolerant power-rail ESD clamp circuit with low standby leakage in 65-nm CMOS process
Chun Yu Lin*, Ming Dou Ker
*Corresponding author for this work
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
2
Citations
(Scopus)