V頻段相位陣列收發器設計與線性化技術之研究

The goal of this project is the development of V-band phased-array transceiver and linearization circuit techniques. The key components of the V-band phase array transceiver integrated circuit include power amplifiers (PAs), low noise amplifiers (LNAs) variable gain amplifier (VGA) and phase shifter, mixer, modulator, and demodulator have been designed and implemented on modern complementary metal–oxide–semiconductor (CMOS) technology. To satisfy the stringent linearity requirement of the modern high-speed digital wireless communication system, the analysis of the linearity for key components of the transceiver is presented. Furthermore, the linearization circuit techniques are developed and proposed to improve the linearity of the transceiver. A V-band CMOS high linearity phased-array transceiver are achieved while maintaining reasonable dc power consumption. During this year, a V-band power amplifier, a V-band low noise amplifier, a V-band variable gain amplifier (VGA) and V-band 4-bit phase shifter, and a V-band bi-directional modulator/demodulator MMICs have been designed and implemented on 0.13-μm, and 90 nm CMOS process. In addition, the linearity of these key components of the phased-array transceiver is analyzed. Furthermore, linearization circuit technologies for different property of the components including power amplifier and low noise amplifier are proposed. Finally, these chips were fabricated by TSMC Semiconductors Corporation through the Chip Implementation Center (CIC) and these MMICs have been measured at the Chip Implementation Center (CIC). Parts of the result have been published in SCI journal and EI international conference paper.