應力型負電容電晶體技術發展與其電性可靠度探討

Project: Government MinistryMinistry of Science and Technology

Project Details

Description

In order to support the development of internet of things (IoT) and artificial intelligence (AI) chips, the semiconductor industries give the priority to the technology research on the next-generation transistor featuring ultralow leakage current and low-power operation. The high-k based negative capacitance (NC) transistor has been proposed in recent years. However, the latest research reported that the doped HfO2 ferroelectric thin film will face a severe challenge, such as the poor dopant tunability and interface quality degradation, multi-domain switching, and ferroelectric domain interface pinning. In this work, we successfully demonstrated a 2.5nm-thick p-type NCFET, featuring an ultralow off-state current of 0.3 pA/μm and a nearly hysteresis-free on/off current switch property. The implementation of p-type NCFET using an ultralow ferroelectric layer of HfAlOx can be ascribed to accurate Al doping scheme to effectively improve ferroelectric polarization and suppress leakage cur-rent. The feasibility study can pave the way for a practical application of energy-efficient logic device. On the other hand, A HfO2-based FeFET in series with a HfAlO ferroelectric capacitor was demonstrated for memory application in this work. Good performances of the pure HfO2-based MOSFET and HfAlO ferroelectric capacitor were achieved. By connecting the pure transistor in series with the HfAlO ferroelectric capacitor to form the MFMIS structure, we further investigated the impact of the ferroelectric capacitor with different thicknesses and areas on the memory behavior. With decreasing the thickness of the ferroelectric capacitor, the memory window of the FeFET was enlarged due to the enhanced ferroelectric properties, which could be also verified by TCAD simulation. Moreover, the memory window of the FeFET could be improved by decreasing the area of the ferroelectric capacitor due to the enhanced capacitance matching level. The present results show that the proposed FeFET device provide new opportunity for future low-power embedded memory application.
StatusFinished
Effective start/end date2019/08/012021/07/31

Keywords

  • Negative capacitance Transistor
  • Ferroelectric field-effect transistor (FeFET)
  • ferroelectric capacitor
  • memory
  • TCAD simulation.

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