Projects per year
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Collaborations and top research areas from the last five years
Projects
- 7 Finished
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子計畫四:前瞻資料鏈結收發機之靜電放電防護
Lin, C.-Y. (PI)
2021/08/01 → 2024/07/31
Project: Government Ministry › Ministry of Science and Technology
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子計畫四:高可靠之全晶片靜電放電防護技術
Lin, C.-Y. (PI)
2020/08/01 → 2021/10/31
Project: Government Ministry › Ministry of Science and Technology
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物聯網晶片之靜電放電防護技術開發(I)
Lin, C.-Y. (PI)
2019/08/01 → 2020/10/31
Project: Government Ministry › Ministry of Science and Technology
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創新無線通訊晶片之靜電放電防護技術開發(I)
Lin, C.-Y. (PI)
2018/08/01 → 2019/07/31
Project: Government Ministry › Ministry of Science and Technology
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應用於高速電路之創新靜電放電防護技術開發(3/3)
Lin, C.-Y. (PI)
2018/02/01 → 2019/01/31
Project: Government Ministry › Ministry of Science and Technology
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3xVDD-tolerant power-rail ESD clamp circuit for negative mixed-voltage interfaces
Cheng, H. E., Wu, C. L. & Lin, C. Y., 2025 Nov, In: Solid-State Electronics. 229, 109185.Research output: Contribution to journal › Article › peer-review
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Dependence of N-Well Guard Ring Bias on Latch-up Failure Level in a HV/LV Mixed-Voltage CMOS IC
Ker, C. C., Hsu, C. W., Lin, C. Y., Ker, M. D., Wang, C. C. & Chiang, T. Y., 2025, 2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., (2025 International VLSI Symposium on Technology, Systems and Applications, VLSI TSA 2025 - Proceedings of Technical Papers).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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A Bidirectional ESD Protection Circuit with High Reliability and Low Leakage for Consumer Electronic Products
Chen, C. C. & Lin, C. Y., 2024, 11th IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2024. Institute of Electrical and Electronics Engineers Inc., p. 793-794 2 p. (11th IEEE International Conference on Consumer Electronics - Taiwan, ICCE-Taiwan 2024).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus) -
All-nMOS Power-Rail ESD Clamp Circuit with Compact Area and Low Leakage
Hsieh, C. Y. & Lin, C. Y., 2024, In: IEEE Transactions on Electron Devices. 71, 9, p. 5205-5211 7 p.Research output: Contribution to journal › Article › peer-review
1 Citation (Scopus) -
Characterization of ESD-induced electromigration on CMOS metallization in on-chip ESD protection circuit
Hou, Y. S. & Lin, C. Y., 2024 Feb 29, In: Japanese Journal of Applied Physics. 63, 2, 02SP58.Research output: Contribution to journal › Article › peer-review
3 Citations (Scopus)