Chiang-Ting Chien

Source: Scopus
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2015
Design of complementary tilt-gate TFETs with SiGe/Si and III-V integrations feasible for ultra-low-power applications
Hsieh, E. R., Lin, Y. S., Zhao, Y. B., Liu, C. H., Chien, C. H. & Chung, S. S., 2015 Sep 24, 2015 Silicon Nanoelectronics Workshop, SNW 2015. Institute of Electrical and Electronics Engineers Inc., 7275322. (2015 Silicon Nanoelectronics Workshop, SNW 2015).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
1 Citation (Scopus)

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